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6. 

Addressing structure
A. defines the fundamental method of determining effective operand addresses
B. are variations in the use of fundamental addressing structures, or some associated actions which are related to addressing.
C. performs indicated operations on two fast registers of the machine and leave the result in one of the registers.
D. all of the above
E. None of the above
7. 

The Memory Buffer Register (MBR)
A. is a hardware memory device which denotes the location of the current instruction being executed.
B. is a group of electrical circuits (hardware), that performs the intent of instructions fetched from memory.
C. contains the address of the memory location that is to be read from or stored into.
D. contains a copy of the designated memory location specified by the MAR after a "read" or the new contents of the memory prior to a "write".
E. None of the above
8. 

The strategy of allowing processes that are logically runnable to be temporarily suspended is called
A. preemptive scheduling
B. non preemptive scheduling
C. shortest job first
D. first come first served
E. None of the above
9. 

The Storage-to-Storage instructions
A. have both their operands in the main store.
B. which perform an operation on a register operand and an operand which is located in the main store, generally leaving the result in the register, expect in the case of store operation when it is also written into the specified storage location.
C. which perform indicated operations on two fast registers of the machine and have the result in one of the registers
D. all of the above
E. None of the above
10. 

The LRU algorithm
A. pages out pages that have been used recently
B. pages out pages that have not been used recently
C. pages out pages that have been least used recently
D. pages out the first page in a given area
E. None of the above